ctac plus

MIL-STD-1750A Channel Monitor

System Overview

C-TAC Plus is an embedded system analyzer. It provides simultaneous Real-Time Non-Intrusive (RTNI) monitoring of all key points in the system. The monitoring is done on a completely non-intrusive basis without the injection of wait states or cycle stealing, and does not affect bus timing or message sequencing. C-TAC also provides time correlation of data across multiple processors, backplanes, and networks as well as system level evaluation in the operational environment.

Key Benefits

  • Data and event correlation and tracking across multiple processors and data busses.

  • Dramatic cost savings in resolving software and integration problems.

  • Ability to significantly shorten project schedules.

  • Significant and affordable improvements in software quality.

  • Includes both RTNI monitoring and emulator debug features in one instrument.

C-TAC Plus Embedded System Lifecycle Diagram
Embedded System Lifecycle Diagram


C-TAC Plus   MIL-STD-1750A Channel Monitor

The MIL-STD-1750A Channel is designed to provide continuous RTNI monitoring for embedded computers in the 1750A family. The monitoring is done on a completely nonintrusive basis, without the injection of wait states or cycle stealing. Software timing and sequencing are not affected by the monitoring function. Multiple channels can be placed in a single C-TAC Plus unit to simultaneously monitor additional processors or buses.

Channel Cross Triggering

The 1750A Channel is able to cross trigger with other channels (processors or buses) or with external equipment

Time correlation

All C-TAC Plus Channels use a common time stamp. This feature allows time correlation of data collected from multiple channels.

Interactive Debug

Although it is non-intrusive, the 1750A Channel also provides all of the intrusive interactive debug features commonly found in in-circuit emulators, including:

  • Start, stop, single step
  • Hardware & software breakpoints
  • Load/dump memory
  • Examine/deposit memory & registers

Common User Interface

Test setup, control, and post-run analysis are accomplished with a symbolic user interface (Microsoft Windows based), which significantly increases user productivity

Graphical Data Analyis

Graphical analysis software allows the user to plot variable data and profile bus traffic quickly and easily

High Volume Data Collection

The 1750A Channel standard configuration provides 120 MBytes of real-time data storage with optional extensions up to 1 Gigabyte

Target Processor Speed

The 1750A Channel operates with target CPU clock speeds up to 40mhz

Modes of Operation

Image: Real-time display of up to 250 variables

Log: Continuously recorded trace of user events to disk. Burst recording rate at bus speed. Sustained recording rate of more than 40,000 events/second.

Snapshot: Re-circulating trace of user events to memory; delayed triggering for pre-, post- and center-trigger placement

Code Coverage: Maintains a scoreboard of code locations accessed during a test

Events Detected

Access Type: Instruction, operand, I/O, DMA, interrupt

Address Value: Up to 250 unique addresses or 83 ranges

Data Value: Signed/unsigned word and long word, and 1750A single and extended floating point; hex, octal or decimal; =, ≠, <, >, ≤, ≥, in-range and out-of-range comparisons; multiple values for binary encoded fields

Message Transactions: BC→RT, RT→BC, RT→RT, MC, errors, specific RT transactions, specific message packets

Actions On Events

Record: Records events in trace memory

Site Transition: Change current state to next state. C-TAC can be configured to monitor events in 64 different user definable states.

Trigger: Generates a trigger point to freeze the snapshot trace. Freeze can be delayed for pre-, post- or centertriggering.

External Trigger: Asserts one of four external trigger lines. Signals other channels, other C-TAC units or other equipment that a particular event occurred within the system.

Time Sync: Asserts the external time sync line when the event occurs

Timer/Counters: Two timer/counters are available for control of additional selected recording

Procedure Event Post-Run Analysis

Process Timeline:
Program execution flow at the procedure level. Graphical presentation of procedure duration and sequencing.

Code Coverage: Indication of code and data areas accessed during test

Auto Symbol Translator

  • Optional feature automates test specification setup to significantly reduce data entry time and errors

  • Automates conversion of symbolic cross-reference information provided by the compiler toolset at C-TAC format

  • Conforms to major JOVIAL and Ada toolsets

  • Automates update of addresses after a software rebuild
C-TAC Analyzer Unit for MIL-STD-1750 Embedded Systems
C-TAC Plus base unit

Configuration for the MIL-STD-1750A Channel

  • Event Detection and Acquisition Card (EDAC) detects and captures all event data specified by the user

  • SCSI hard disk drive records event data captured by the EDAC

  • Personality Interface Module (PIM) maps the 1750A system hardware and instruction set architecture for interface with the EDAC

  • Probe Adaptor (PAD) conditions the 1750A signals for transmission to the PIM

  • Target Lead Set (TLS) provides a custom connection between the PAD and the 1750A system


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